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5-A DC Motor Driver with Inhibit
TLE 5207
Overview
Features * * * * * * * Output current 4 A (peak 5 A) Inhibit with very low quiescent current (typ. 20 A) I/O error diagnostics Short-circuit proof Four-quadrant operation Integrated free-wheeling diodes Wide temperature range
P-TO220-7-1
P-TO220-7-8
Type TLE 5207 TLE 5207G Description
Ordering Code Q67000-A9295 Q67006-A9296
Package P-TO220-7-1 P-TO220-7-8
TLE 5207 is an integrated power bridge with inhibit feature and DMOS output stages for driving DC motors. This motor bridge is optimized for driving DC motors in reversible operation. The internal protective circuitry in particular ensures that no crossover currents can occur. Because the free-wheeling diodes are integrated, the external circuitry that is necessary is restricted to the capacitors on the supply voltage. The two control inputs have TTL/CMOS-compatible levels.
Semiconductor Group
1
1998-02-01
TLE 5207
TLE 5207
TLE 5207G
1
2
345
6
7
EF Q1 1
GND 2
VS
Q2
AEP01224
Figure 1
Pin Configuration (top view)
Pin Definitions and Functions Pin 1 2 3 4 5 6 7 Symbol Function Q1 EF I1 GND I2 Output of channel 1; short-circuit proof, free-wheeling diodes integrated for inductive loads Error flag; TTL/CMOS-compatible output for error detection (open drain) Control input 1; TTL/CMOS-compatible Ground; connected internally to cooling fin Control input 2; TTL/CMOS-compatible Supply voltage; wire with capacitor matching load Output of channel 2; Short-circuit proof, free-wheeling diodes integrated for inductive loads
VS
Q2
Semiconductor Group
2
1998-02-01
TLE 5207
Circuit Description Input Circuit The control inputs consist of TTL/CMOS-compatible Schmitt triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages.In case of low potential at both inputs the device is switched in inhibit-condition with very low current consumption. Output Stages The output stages from a switched H-bridge. Protective circuits make the outputs shortcircuit proof from ground up to a supply voltage of 16 V. Positive and negative voltage spikes, which occur when switching inductive loads, are limited by integrated power diodes. Monitoring and Protective Functions An internal circuit ensures that all output transistors are turned-OFF if the supply voltage is below the operating range. Functional Truth Table I1 L L H H I2 L H L H Q1 Z L H H Q2 Z H L H Comments Device in inhibit condition with very low current consumption; outputs in tristate condition (high impedance) Motor turns clockwise Motor turns counterclockwise Motor brake; both high side transistors turned-ON
Notes for Output Stage Symbol L H Z Value Low side transistor is turned-ON; High side transistor is turned-OFF High side transistor is turned-ON; Low side transistor is turned-OFF High side transistor and Low side transistor are turned-OFF
A monitoring circuit for each output transistor detects whether the particular transistor is active and in this case prevents the corresponding source transistor (sink transistor) from conducting in sink operation (source operation). This effectively guards against crossover currents. Pulse-width operation is possible up to a maximum switching frequency of 1 kHz for any load. Depending on the load current higher frequencies are possible.
Semiconductor Group 3 1998-02-01
TLE 5207
Protective Function Various errors like short-circuit to + VS, ground or across the load are detected. All faults result in turn-OFF of the output stages after a delay of 40 s and setting of the error flag EF to ground. Changing the inputs resets the error flag. Output Shorted to Ground Detection If a high side transistor is switched on and its output is shorted to ground, the output current is limited to typ 11 A. After a delay of 40 s all outputs will be switched off and the error flag EF is set to ground. Output Shorted to + VS and Overload Detection An internal circuit detects if the current through the low side transistor is higher than 4 A typ. In this case all outputs are turned-OFF after 40 s and the error flag is set to ground. At a junction temperature higher than 160 C the thermal shutdown turns-OFF, all four output stages commonly and the error flag is set without a delay. Diagnosis Input I1 L L H H I2 L H L H Z L H H Output Q1 Q2 Z H L H Shorted to GND Q1, Q2 Q2 Q1 Q1, Q2 Diagnosis Shorted to VS Overload Q1, Q2 Q1 Q2 - - X X - H L L L EF
Semiconductor Group
4
1998-02-01
TLE 5207
Error Flag 2 Error Flag Protection Circuit 1
VS
6
Control Input 1
3
1
Output 1
Control Input 2
5
7
Output 2
Protection Circuit 1
4 GND
AEB01225
Figure 2
Block Diagram
Semiconductor Group
5
1998-02-01
TLE 5207
Electrical Characteristics Absolute Maximum Ratings Tj = - 40 to 150 C Parameter Symbol Limit Values min. Voltage Supply voltage Supply voltage Logic input voltage Diagnostics output voltage Current Free-wheeling current Output current1) Output current Junction temperature Storage temperature Thermal Resistance Junction-case Junction-ambient
1)
Unit
Remarks
max.
VS VS VI1 , 2 VEF
- 0.3 -1 - 0.3 - 0.3
40 - 6 6
V V V V
-
t < 500 ms; IS < 5 A VS = 0 - 40 V
-
IF IQ IQ Tj Tstg
-4 -4 -5 - 40 - 50
4 4 5 150 150
A A A C C
Tj 150 C
-
t < 2 ms
- -
Rth jC Rth jA
- -
4 65
K/W K/W
- -
During overload condition currrents higher than 5 A can dynamically occur, before the device shuts off, without any damage to the device.
Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Operating Range Parameter Supply voltage Logic input voltage Switching frequency1) Junction temperature
1)
Symbol
Limit Values min. max. 24 6 1 150 6 - 0.3 - - 40
Unit V V kHz C
Remarks - - - -
VS VI1 , 2 f Tj
Depending on load, higher frequencies are possible.
Note: In the operating range the functions given in the circuit description are fulfilled.
Semiconductor Group 6 1998-02-01
TLE 5207
Characteristics VS = 6 to 18 V; Tj = - 40 to 150 C Parameter Symbol min. General Quiescent current Quiescent current Limit Values typ. max. Unit Test Condition
Iq Iq
-
- 20
5 40
mA A
IL = 0 A Tj = 25 C
VI1 = VI2 = 0 V; VS = 12 V
Quiescent current Turn-ON delay Turn-OFF delay Turn-ON time Turn-OFF time Undervoltage Undervoltage Logic Control inputs H-input voltage L-input voltage Hysteresis of input voltage H-input current L-input current Diagnostics output Delay time L-output voltage Leakage current Error detection Switching threshold Overcurrent Overcurrent
Iq td1 td2 tr tf VS VS
- - - - - - - - - - 5.5 4.5
80 20 20 20 20 5.9 5.5
A s s s s V V
VI1 = VI2 = 0 V; VS = 12 V
Input to Output Input to Output
IQ = 2.5 A; cf diagram IQ = 2.5 A; cf diagram IC ON IC OFF
VIH VIL
VI
II II
2.8 -
- - 0.8
- 1.2
V V V
- - -
0 -2 20 - - 3.5 5 4.5
25 0 40 - - 4.5 7 6
50 2 75 0.4 10 5.5 10 9
A A s V A V A A
VI = VIH = 2.8 V VI = VIL
-
td VFF IRD VEU IF1 IF1
I = 3 mA
-
Tj 25 C 25 C < Tj 150 C
Semiconductor Group
7
1998-02-01
TLE 5207
Characteristics (cont'd) VS = 6 to 18 V; Tj = - 40 to 150 C Parameter Symbol min. Outputs Limit Values typ. max. Unit Test Condition
RDSON (Source) RDSON (Source) RDSON (Source) RDSON (Source)
Diode forward voltage Diode forward voltage
1)
- - - -
- - - - - -
- - - - - -
0.4 0.65 0.4 0.65 1.5 1.5
V V
VS > 6 V; Tj = 25 C1) VS > 6 V; Tj = 150 C1) VS > 6 V; Tj = 25 C1) VS > 6 V; Tj = 150 C1) IF = 3 A IF = 3 A
VFU VFL
Values for RDSON are for t > 100 s after applying + VS and t > 400 s after changing from VI1 = VI2 = L to VI1 or VI2 = H.
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at Tj = 25 C and the given supply voltage.
Semiconductor Group
8
1998-02-01
TLE 5207
q, S
4700 F 63 V
470 nF
6
2 1
VS
1
3
Q1
RL
TLE 5207
V 1
2
5 4
7
Q2
VEF
V2
M
VQ2
V Q1
AES01569
Figure 3
Test Circuit
Figure 4
Timing Diagram
Semiconductor Group
9
1998-02-01
TLE 5207
+ VS = 12 V 220 nF 5V 2 k Error Flag
*
6 2 1 3
TLE 5207
7
M
Control Inputs 5 4
AES01570
*)Necessary for isolating supply voltage or interruption (eg 470 F).
Figure 5
Application Circuit
Semiconductor Group
10
1998-02-01
TLE 5207
Diagrams
RON Resistance of Output Stage over
Temperature
800
AED01305
Output Voltage on Diagnostics Output versus Current
300
AED01306
R ON
m 600
6 V< VS <18 V
VEF
mV 250
max
200
VS =12 V
T j = 150 C
typ 400
150
T j = 25 C
100
200
50
0
0
25
50
75
100
C
150
0
0
1
2
3
4
mA
6
Tj
Forward Current of Upper FreeWheeling Diode versus Voltage
4 A 3
AED01303
Forward Current of Lower Free-Wheeling Diode versus Voltage
4 A 3
AED01304
F
F
T j = 150 C T j = 25 C
2
T j = 150 C
2
T j = 25 C
1
1
0 0.2
0.6
1
V
1.4
0 0.2
0.6
1
V
1.4
VF
VF
Semiconductor Group
11
1998-02-01
TLE 5207
Overcurrent Threshold versus Temperature
AED01681
Quiescent Current (device active) versus Temperature
AED01682
10
5
Q
A 8 typ 6 min
S
mA 4
3
typ
4
2
2
1
0 -40
0
40
80
120 C 160
0 -40
0
40
80
120 C 160
Tj
Tj
Input Threshold versus Temperature
AED01683
Switching Threshold VEU versus Temperature
AED01684
3.5
5.5
V
V 3.0
VF
V 5.0
2.5
typ
V H
4.5 typ
2.0 typ 1.5
4.0
V L
3.5
1.0 -40
0
40
80
120 C 160
3.0 -40
0
40
80
120 C 160
Tj
Tj
Semiconductor Group
12
1998-02-01
TLE 5207
E2 11 A
E1 = Low
Q2
V Q2
R Short x 11 A
40 s
V FL
EF
AED01689
Figure 6
Timing Diagram for Output Shorted to Ground (E1 = High)
E2 20 A
E1 = Low
Q1
VS V Q1 R Short x 20 A
40 s EF
AED01686
V FU
Figure 7
Timing Diagram for Output Shorted to VS (E1 = High)
Semiconductor Group
13
1998-02-01
TLE 5207
E2
E1 = Low
Overcurrent Switching Threshold
F1
Load
40 s
VS
VF
V Q1 R ON x Load VS R ON x Load V Q2
VF
EF
AED01687
Figure 8
Timing Diagram for Overcurrent and E1 = E2 Inverted (Device not inhibited)
Semiconductor Group
14
1998-02-01
TLE 5207
Package Outlines P-TO220-7-1 (Plastic Transistor Single Outline Package)
10 +0.4 10.2 -0.2 3.75
+0.1
4.6 -0.2 1 x 45 1.27
+0.1
2.8
19.5 max
16 0.4
8.8 -0.2
2.6 0.4 +0.1 8.4 0.4
8.6 0.3
15.4 0.3
GPT05108
1 1.27
7 0.6
+0.1 1)
0.6 M 7x
4.5 0.4
1) 0.75 -0.15 at dam bar (max 1.8 from body) 1) 0.75 -0.15 im Dichtstegbereich (max 1.8 vom Korper)
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Semiconductor Group 15
10.2 0.3
Dimensions in mm 1998-02-01
TLE 5207
P-TO220-7-8 (Plastic Transistor Single Outline Package)
4.6 1.27 10.2 8.0 1)
3.5
0.2 2.6
10.1
0.6 1.27 6 x 1.27 = 7.62
0.4
GPT05874
1) shear and punch direction burr free surface
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 16
1.5
8.8
Dimensions in mm 1998-02-01

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